phase lock

Study of Design Method for Charge Pump Phase Lock Loop

电荷泵锁相环设计方法研究

The UPS System usually adopts PLL ( Phase Lock Loop) in the voltage control system, but when the load and power factor varies, the aberration influence induced by the voltage output wave is still not get a good solution.

目前，不间断电源逆变器通常采用锁相环的电压调节控制系统，但在负载及负载功率因数变化时，输出波形造成的畸变影响仍未得到很好的解决。

The orthogonal analog phase lock loop is used to get the timing information of the impulse radio system and the multi-path component separation.

使用正交模拟锁相环路对无载波的脉冲无线电系统实现多径捕获和同步提取。

With the cost reduction of digital IC and development of phase lock, phase lock technique was extensively used in motor control.

随着数字集成电路成本的降低和锁相技术的发展，锁相技术逐渐在电机控制中得到广泛应用。

The weak fluorescence of the sensor head has been detected by the phase lock amplifying technology.

采用锁相放大技术,实现了对弱荧光信号的检测.

Design of SDH/ SONET Tributary Clock Jitter Attenuation Digital Phase Lock Loop

SDH/SONET支路时钟抖动衰减数字锁相环设计

DSP Based Design of Phase Lock Loop for Digital UPS

基于DSP的数字化UPS锁相设计

Frequency source finally choose the decimal points a VCO frequency and phase lock loop, again through the two times frequency output reached the final index signal.

频率源最后选用了小数分频和压控振荡器构成锁相环路，再通过二次倍频最终输出达到指标的信号。

Relational Digital Phase Lock Loop slot synchronizer for PPM Laser Communication System

PPM光通信相关式数字锁相环时隙同步器

A improved I p I q detecting method is put forward. In order to select phase A fundamental positive sequence voltage, a voltage selected unit based on low pass filter is used to replace the phase lock loop of I p I q detecting method.

之后提出了一种改进的ip-iq检测法，在该检测法中用基于低通滤波的A相正序电压提取单元代替原ip-iq检测法中的锁相环，以提取A相正序电压。

And also it provides the practical means for testing the impedance of battery by using phase lock-in amplifying circuit, improving the accuracy and anti disturbance ability when testing on line.

并提出了采用锁相放大技术实现内阻在线测量的方法，提高系统测量准确性的和抗干扰能力。

The approach can effectively detect the harmonic and reactive currents, and it is no need to adopt the fixed frequency filters and Phase Lock Loo p ( PLL) in it, and not only its circuit configuration is simple, but also to realize it is easily.

该方法能有效地检测出单相电路的谐波电流与基波电流，且不需要采用固定频率的滤波器，不需要锁相环，电路结构简单，易于实现。

PLL ( Phase Lock Loop) technology is employed to realize the frequency tracing and constant phase angle control;

通过采用锁相环技术实现了逆变器工作频率的自动跟踪和容性逆变角度的恒值控制；

Analysis and Design of Phase Lock Speed Servocontrol System

锁相速度伺服系统设计与分析

This paper discusses a maximum likelihood estimation of phase lock look as restrained carrier tracking loop.

讨论了锁相环作为抑制载波跟踪环的最大似然估计,并由此得到一种近似最佳的环路形式.

Both incorporation exterior VCO and loop filter could rattling realize celerity Phase Lock function.

结合外部VCO和环路滤波器可以很好的实现快速锁相功能.

Timing Acquisition of Impulse Radio System with Orthogonal Analog Phase Lock Loop

脉冲无线电通信系统的正交锁相环路同步方法

First modular design the three-phase phase lock loop, which realizes functions of the phase discriminator, loop filter and NCO. With the top connections finished, the whole three-phase PLL design has completed.

首先对三相锁相环进行模块化设计，然后分别实现了鉴相器、环路滤波器和数控振荡器的功能，最后经过顶层连接，完成了整个三相锁相环的设计。

A dither control method using phase lock technology is presented and a controller is developed.

本文提出了用锁相环跟踪抖动机构自然频率漂移的方法,设计了一种新型抖动控制器.